/*******************************************************************************
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#ifndef __DNA_GPT_H
#define __DNA_GPT_H




/**  
 *  @brief GPT No. type definition 
 */
typedef enum {
	DNA_GPT0_ID = 0,                      /*!< GPT0 module define */
  	DNA_GPT1_ID = 1,                    /*!< GPT1 module define */
  	DNA_GPT2_ID = 2,                      /*!< GPT2 module define */
  	DNA_GPT3_ID = 3,                    /*!< GPT3 module define */  
}dna_gpt_id_e;


/**         
 *  @brief GPT clock source type definition
 */
typedef enum
{
  DNA_GPT_CLOCK_0      = 0,         /*!< Clock 0 */
  DNA_GPT_CLOCK_1      = 1,         /*!< Clock 1 */
}dna_gpt_clocksrc_e;


/**         
 *  @brief Counter value register update mode type definition
 */
typedef enum
{
  DNA_GPT_CNT_VAL_UPDATE_NORMAL = 0,     /*!< Counter value register update mode: auto-update normal */
  DNA_GPT_CNT_VAL_UPDATE_FAST   = 1,     /*!< Counter value register update mode: auto-update fast */
  DNA_GPT_CNT_VAL_UPDATE_OFF    = 3,     /*!< Counter value register update mode: off */
}dna_gpt_cntupdate_e;


/**         
 *  @brief GPT input capture edge type definition
 */
typedef enum
{
  DNA_GPT_IC_RISING_EDGE      = 0,     /*!< Input capture rising edge selected */
  DNA_GPT_IC_FALLING_EDGE     = 1,     /*!< Input capture falling edge selected */
}dna_gpt_icedge_e;

/**         
 *  @brief GPT channel function type definition
 */
typedef enum
{ 
  DNA_GPT_CH_FUNC_NO            = 0,    /*!< GPT channel function: no function */
  DNA_GPT_CH_FUNC_INPUT         = 1,    /*!< GPT channel function: input capture */
  DNA_GPT_CH_FUNC_ONESHOT_PULSE = 4,    /*!< GPT channel function: one_shot edge */
  DNA_GPT_CH_FUNC_ONESHOT_EDGE  = 5,    /*!< GPT channel function: one_shot pulse */
  DNA_GPT_CH_FUNC_PWM_EDGE      = 6,    /*!< GPT channel function: edge-aligned PWM */
  DNA_GPT_CH_FUNC_PWM_CENTER    = 7,    /*!< GPT channel function: center-aligned PWM */
}dna_gpt_channelfunc_e;

/**         
 *  @brief GPT channel number type definition
 */
typedef enum
{
  DNA_GPT_CH_0           = 0,        /*!< GPT channel No.: 0 */
  DNA_GPT_CH_1           = 1,        /*!< GPT channel No.: 1 */  
  DNA_GPT_CH_2           = 2,        /*!< GPT channel No.: 2 */
  DNA_GPT_CH_3           = 3,        /*!< GPT channel No.: 3 */    
  DNA_GPT_CH_4           = 4,        /*!< GPT channel No.: 4 */
  DNA_GPT_CH_5           = 5,        /*!< GPT channel No.: 5 */
}dna_gpt_channelnumber_e;

/**         
 *  @brief GPT channel PWM and one-shot waveform polarity type definition
 */
typedef enum
{
  DNA_GPT_CH_WAVE_POL_POS,      /*!< GPT channel waveform polarity: positive */
  DNA_GPT_CH_WAVE_POL_NEG       /*!< GPT channel waveform polarity: negative */
}dna_gpt_channelwavepol_e;


/**  
 *  @brief GPT interrupt type definition 
 */
typedef enum
{
  DNA_GPT_INT_CH0,                   /*!< GPT channel 0 int flag */
  DNA_GPT_INT_CH1,                   /*!< GPT channel 1 int flag */
  DNA_GPT_INT_CH2,                   /*!< GPT channel 2 int flag */
  DNA_GPT_INT_CH3,                   /*!< GPT channel 3 int flag */
  DNA_GPT_INT_CH4,                   /*!< GPT channel 4 int flag */
  DNA_GPT_INT_CH5,                   /*!< GPT channel 5 int flag */
  
  DNA_GPT_INT_CH0_ERR,             /*!< GPT channel 0 error int flag */
  DNA_GPT_INT_CH1_ERR,             /*!< GPT channel 1 error int flag */
  DNA_GPT_INT_CH2_ERR,             /*!< GPT channel 2 error int flag */
  DNA_GPT_INT_CH3_ERR,             /*!< GPT channel 3 error int flag */
  DNA_GPT_INT_CH4_ERR,             /*!< GPT channel 4 error int flag */
  DNA_GPT_INT_CH5_ERR,             /*!< GPT channel 5 error int flag */
  
  DNA_GPT_INT_CNT_UPP,             /*!< GPT counter upper overflow flag */
                                 
  DNA_GPT_INT_DMA0_OF,            /*!< GPT DMA channel 0 overflow flag */
  DNA_GPT_INT_DMA1_OF,           /*!< GPT DMA channel 1 overflow flag */ 
  
  DNA_GPT_INT_ALL                 /*!< All GPT interrupt flag */
}dna_gpt_int_e; 

/**  
 *  @brief GPT status type definition 
 */
typedef enum
{
  DNA_GPT_STATUS_CH0,                   /*!< GPT channel 0 int flag */
  DNA_GPT_STATUS_CH1,                   /*!< GPT channel 1 int flag */
  DNA_GPT_STATUS_CH2,                   /*!< GPT channel 2 int flag */
  DNA_GPT_STATUS_CH3,                   /*!< GPT channel 3 int flag */
  DNA_GPT_STATUS_CH4,                   /*!< GPT channel 4 int flag */
  DNA_GPT_STATUS_CH5,                   /*!< GPT channel 5 int flag */
  
  DNA_GPT_STATUS_CH0_ERR,             /*!< GPT channel 0 error int flag */
  DNA_GPT_STATUS_CH1_ERR,             /*!< GPT channel 1 error int flag */
  DNA_GPT_STATUS_CH2_ERR,             /*!< GPT channel 2 error int flag */
  DNA_GPT_STATUS_CH3_ERR,             /*!< GPT channel 3 error int flag */
  DNA_GPT_STATUS_CH4_ERR,             /*!< GPT channel 4 error int flag */
  DNA_GPT_STATUS_CH5_ERR,             /*!< GPT channel 5 error int flag */
  
  DNA_GPT_STATUS_CNT_UPP,             /*!< GPT counter upper overflow flag */
                                 
  DNA_GPT_STATUS_DMA0_OF,            /*!< GPT DMA channel 0 overflow flag */
  DNA_GPT_STATUS_DMA1_OF,               /*!< GPT DMA channel 1 overflow flag */ 
  
  DNA_GPT_STATUS_ALL                 /*!< All GPT interrupt flag */
}dna_gpt_status_e; 

/**  
 *  @brief GPT input filter type definition 
 */
typedef enum
{
  DNA_GPT_INPUT_FILTER_1,             /*!< GPT input filter : 1 */
  DNA_GPT_INPUT_FILTER_2,             /*!< GPT input filter : 2 */
  DNA_GPT_INPUT_FILTER_3,             /*!< GPT input filter : 3 */
  DNA_GPT_INPUT_FILTER_4,             /*!< GPT input filter : 4 */
  DNA_GPT_INPUT_FILTER_5,             /*!< GPT input filter : 5 */
  DNA_GPT_INPUT_FILTER_6,             /*!< GPT input filter : 6 */
  DNA_GPT_INPUT_FILTER_7,             /*!< GPT input filter : 7 */
}dna_gpt_inputfilter_e; 

/**  
 *  @brief GPT DMA channel type definition 
 */
typedef enum
{
  DNA_GPT_DMA0,             /*!< GPT DMA channel : 0 */
  DNA_GPT_DMA1,             /*!< GPT DMA channel : 1 */
}dna_gpt_dmachannel_e; 

/**      
 *  @brief GPT config struct type definition  
 */
typedef struct
{
  dna_gpt_clocksrc_e clockSrc;        /*!< GPT counter clock source selection 
                                          GPT_CLOCK_0 (0): Clock 0                                     
                                          GPT_CLOCK_1 (1): Clock 1 */  
  
  dna_gpt_cntupdate_e cntUpdate;     /*!< GPT counter value update mode selection
                                         GPT_CNT_VAL_UPDATE_NORMAL (0): auto-update normal 
                                         GPT_CNT_VAL_UPDATE_FAST (1): auto-update fast 
                                         GPT_CNT_VAL_UPDATE_OFF (3): update off */
                                          
  uint32_t clockDivider;             /*!< Clock divider value(range: 0~15).
                                          The divided clock is calculated by:
                                          CLK_div = CLK / (2^clockDivider)*/                                      

  uint32_t clockPrescaler;           /*!< Clock prescaler value(range: 0~127).
                                          The divided clock is calculated by : 
                                          CLK_ps = CLK / (clockPrescaler + 1)*/
  
  uint32_t uppVal;                   /*!< Counter overflow value */

}dna_gpt_config_t;

/**         
 *  @brief GPT input config type definition
 */
typedef struct
{
  uint32_t sampleClkDivider;           /*!< Input trigger sampling clock divider (range: 0~7). 
                                          It can be calculated by:
                                          SCLK_DIV = SCLK / (2 ^ trigClkDivider) */

  dna_gpt_inputfilter_e 	 trigFilter;   /*!< Input trigger filtering.
                                          It indicates how many consecutive cycles the input trigger should be sampled 
                                          before it is considered as a valid edge.
                                          GPT_INPUT_FILTER_1 (0): 1 
                                          GPT_INPUT_FILTER_2 (1): 2 
                                          GPT_INPUT_FILTER_3 (2): 3 
                                          GPT_INPUT_FILTER_4 (3): 4
                                          GPT_INPUT_FILTER_5 (4): 5 
                                          GPT_INPUT_FILTER_6 (5): 6 
                                          GPT_INPUT_FILTER_7 (6): 7 */

}dna_gpt_inputconfig_t;

/**         
 *  @brief GPT channel config type definition
 */
typedef struct
{
  dna_gpt_channelwavepol_e polarity;     /*!< GPT channel PWM and one-shot waveform polarity selection
                                             GPT_CH_WAVE_POL_POS(0): positive 
                                             GPT_CH_WAVE_POL_NEG(1): negative */
  
  uint32_t cntMatchVal0;                /*!< Channel counter match value 0 */
                                      
  uint32_t cntMatchVal1;                /*!< Channel counter match value 1 */
  
}dna_gpt_channeloutputconfig_t;


/*@} end of group GPT_Public_Types definitions */


/** @defgroup GPT_Public_Constants
 *  @{
 */ 

/**         
 *  @brief GPT channel reset definition
 */
#define DNA_GPT_RST_CH0           (0x01 << 0)
#define DNA_GPT_RST_CH1           (0x01 << 1)
#define DNA_GPT_RST_CH2           (0x01 << 2)
#define DNA_GPT_RST_CH3           (0x01 << 3)
#define DNA_GPT_RST_CH4           (0x01 << 4)
#define DNA_GPT_RST_CH5           (0x01 << 5)
#define DNA_GPT_RST_ALL_CH         0x3f


/** @defgroup GPT_INT_MASK       
 *  @{
 */     
#define DNA_GPT_INT_CH0_MSK              0x00000001
#define DNA_GPT_INT_CH1_MSK              0x00000002
#define DNA_GPT_INT_CH2_MSK              0x00000004
#define DNA_GPT_INT_CH3_MSK              0x00000008
#define DNA_GPT_INT_CH4_MSK              0x00000010
#define DNA_GPT_INT_CH5_MSK              0x00000020
#define DNA_GPT_INT_CH_ALL_MSK           0x0000003F

#define DNA_GPT_INT_CH0_ERR_MSK          0x00000100
#define DNA_GPT_INT_CH1_ERR_MSK          0x00000200
#define DNA_GPT_INT_CH2_ERR_MSK          0x00000400
#define DNA_GPT_INT_CH3_ERR_MSK          0x00000800
#define DNA_GPT_INT_CH4_ERR_MSK          0x00001000
#define DNA_GPT_INT_CH5_ERR_MSK          0x00002000
#define DNA_GPT_INT_CH_ALL_ERR_MSK       0x00003F00

#define DNA_GPT_INT_CNT_UPP_MSK          0x00010000

#define DNA_GPT_INT_DMA0_OVF_MSK         0x01000000
#define DNA_GPT_INT_DMA1_OVF_MSK         0x02000000

#define DNA_GPT_INT_ALL_MSK              0x03013F3F

/*@} end of group GPT_INT_MASK */

/**
 *  @brief Total channel number 
 */
#define DNA_GPT_NUMBER        4

/**
 *  @brief Total channel number 
 */
#define DNA_GPT_CHANNEL_NUMBER        6

/**
 *  @brief Total channel number 
 */
#define DNA_GPT_DMA_CHANNEL_NUMBER        2

/**
 *  @brief Total interrupt number 
 */
#define DNA_GPT_INT_NUMBER            15

 /**
 *  @brief Total status number 
 */
#define DNA_GPT_STATUS_NUMBER            15

/**        
 *  @brief GPT modules check
 */
#define DNA_IS_GPT_PERIPH(PERIPH)        ((PERIPH) < DNA_GPT_NUMBER)
 
/**        
 *  @brief GPT interrupt type check
 */
#define DNA_IS_GPT_INT_TYPE(INT_TYPE)    ((INT_TYPE) <= DNA_GPT_INT_NUMBER)

/**        
 *  @brief GPT status type check
 */
#define DNA_IS_GPT_STATUS_TYPE(STS_TYPE)    ((STS_TYPE) <= DNA_GPT_STATUS_NUMBER)
                                                                                         
/**        
 *  @brief GPT channel number check
 */
#define DNA_IS_GPT_CHANNEL_ID(CHID)    ((CHID) < DNA_GPT_CHANNEL_NUMBER)

/**        
 *  @brief GPT DMA channel number check
 */
#define DNA_IS_GPT_DMA_CHANNEL_ID(CHID)    ((CHID) < DNA_GPT_DMA_CHANNEL_NUMBER)



/*@} end of group GPT_Public_Constants */

/** @defgroup GPT_Public_Macro
 *  @{
 */


/*@} end of group GPT_Public_Macro */

/** @defgroup GPT_Public_FunctionDeclaration
 *  @brief GPT functions statement
 *  @{
 */




/****************************************************************************//**
 * @brief      Initialize the GPT 
 *
 * @param[in]  gptID:  Select the GPT module
 * @param[in]  gptConfig:  Pointer to a GPT configuration structure
 *
 * @return none
 *
 * Initialize the GPT 
 *******************************************************************************/
void dna_gpt_init(dna_gpt_id_e gptID, dna_gpt_config_t* gptConfig);


/****************************************************************************//**
 * @brief      Initialize GPT input function 
 *
 * @param[in]  gptID:  Select the GPT module
 * @param[in]  gptInputConfig : Pointer to a input function configuration
 *
 * @return none
 *
 *******************************************************************************/
void dna_gpt_inputconfig(dna_gpt_id_e gptID, dna_gpt_inputconfig_t* gptInputConfig);

/****************************************************************************//**
 * @brief      Reset GPT counter 
 *
 * @param[in]  gptID:  Select the GPT module
 *
 * @return reset status
 *  
 * Reset the GPT counter
 *******************************************************************************/
int dna_gpt_counterreset(dna_gpt_id_e gptID);


/****************************************************************************//**
 * @brief      Start the GPT counter
 *
 * @param[in]  gptID:  Select the GPT module
 *
 * @return none
 *
 * Start the GPT 
 *******************************************************************************/
void dna_gpt_start(dna_gpt_id_e gptID);


/****************************************************************************//**
 * @brief      Stop the GPT counter
 *
 * @param[in]  gptID:  Select the GPT module
 *
 * @return none
 *
 * Stop the GPT 
 *******************************************************************************/
void dna_gpt_stop(dna_gpt_id_e gptID);


/****************************************************************************//**
 * @brief      Selet the channel function
 *
 * @param[in]  gptID:  Select the GPT module
 * @param[in]  channelID: Channel ID
 * @param[in]  gptChOutConfig:  Pointer to a channel output configuration
 *
 * @return none
 *
 *******************************************************************************/
void dna_gpt_channelfuncselect(dna_gpt_id_e gptID, dna_gpt_channelnumber_e channelID,
                           dna_gpt_channelfunc_e channelFunc);


/****************************************************************************//**
 * @brief      Initialize GPT channel config for PWM and One-shot modes
 *
 * @param[in]  gptID:  Select te GPT module
 * @param[in]  channelID:  Channel ID
 * @param[in]  gptChOutConfig:  Pointer to a channel output configuration
 *
 * @return none
 *
 *******************************************************************************/
void dna_gpt_channeloutputconfig(dna_gpt_id_e gptID, dna_gpt_channelnumber_e channelID, 
                          dna_gpt_channeloutputconfig_t* gptChOutConfig);


/****************************************************************************//**
 * @brief      Select the channel input capture edge 
 *
 * @param[in]  gptID:  Select the GPT module
 * @param[in]  channelID:Channel ID
 * @param[in]  edgeSel : Select the input capture edge
 *
 * @return none
 *
 *******************************************************************************/
void dna_gpt_channelinputconfig(dna_gpt_id_e gptID, dna_gpt_channelnumber_e channelID, dna_gpt_icedge_e edgeSel);


/****************************************************************************//**
 * @brief      GPT channel reset
 *
 * @param[in]  gptID:  Select the GPT module
 * @param[in]  resetChannelNo:  Select the GPT channels that need to be reset. 
 *                              Its value should be one of GPT_RST_CH0(0x01), 
 *                              GPT_RST_CH1(0x02), GPT_RST_CH3(0x04), GPT_RST_CH4(0x08),
 *                              GPT_RST_CH5(0x10) or bitwise OR operation on any 
 *                              number of them.
 *
 * @return none
 *
 * Reset the GPT channel
 *******************************************************************************/
void dna_gpt_channelreset(dna_gpt_id_e gptID, uint32_t resetChannelNo);


/****************************************************************************//**
 * @brief      Set GPT counter overflow value 
 *
 * @param[in]  gptID:  Select the GPT module
 * @param[in]  uppVal: Counter overflow value
 *
 * @return none
 *
 *******************************************************************************/
void dna_gpt_setcounteruppval(dna_gpt_id_e gptID, uint32_t uppVal);

/****************************************************************************//**
 * @brief      Set channel counter match value 0 
 *
 * @param[in]  gptID:  Select the GPT module
 * @param[in]  channelID: Channel ID
 * @param[in]  cmr0:  Channel counter match value 0
 *
 * @return none
 *
 *******************************************************************************/
void dna_gpt_setchannelmatchval0(dna_gpt_id_e gptID, dna_gpt_channelnumber_e channelID, uint32_t cmr0);

/****************************************************************************//**
 * @brief      Set channel counter match value 1
 *
 * @param[in]  gptID:  Select the GPT module
 * @param[in]  channelID:  Channel ID
 * @param[in]  cmr1:  Channel counter match value 1
 *
 * @return none
 *
 *******************************************************************************/
void dna_gpt_setchannelmatchval1(dna_gpt_id_e gptID, dna_gpt_channelnumber_e channelID, uint32_t cmr1);



/****************************************************************************//**
 * @brief      Set channel counter match value 0 and counter match value 0
 *
 * @param[in]  gptID:  Select he GPT module
 * @param[in]  channelID:  Channel ID
 * @param[in]  cmr0:  Channel counter match value 0
 * @param[in]  cmr1:  Channel counter match value 1
 *
 * @return none
 *
 *******************************************************************************/
void dna_gpt_setchannelbothmatchval(dna_gpt_id_e gptID, dna_gpt_channelnumber_e channelID, uint32_t cmr0, uint32_t cmr1);


/****************************************************************************//**
 * @brief      Get GPT capture value 
 *
 * @param[in]  gptID:  Select the GPT module
 * @param[in]  channelID:  Channel ID
 *
 * @return capture value
 *
 *******************************************************************************/
uint32_t dna_gpt_getcaptureval(dna_gpt_id_e gptID, dna_gpt_channelnumber_e channelID);


 /****************************************************************************//**
 * @brief      Get counter value 
 *
 * @param[in]  gptID:  Select the GPT module
 *
 * @return counter value
 *
 *******************************************************************************/
uint32_t dna_gpt_getcounterval(dna_gpt_id_e gptID);

/****************************************************************************//**
 * @brief  GPT DMA channel enable / disable function 
 *
 * @param[in]  gptID: Select the GPT module
 * @param[in]  dmaChannel: Select the DMA channel
 * @param[in]  state: Enable / Disable  
 *
 * @return none
 *
 *******************************************************************************/
void dna_gpt_dmacmd(dna_gpt_id_e gptID, dna_gpt_dmachannel_e dmaChannel, int state);


/****************************************************************************//**
 * @brief  GPT channel selection for DMA channels function 
 * 
 * @param[in]  gptID: Select the GPT module
 * @param[in]  dmaChannel: Select the DMA channel 
 * @param[in]  channelID: GPT channel ID
 *
 * @return none
 *
 *******************************************************************************/
void dna_gpt_dmachannelselect(dna_gpt_id_e gptID, dna_gpt_dmachannel_e dmaChannel,
                          dna_gpt_channelnumber_e channelID);


/****************************************************************************//**
 * @brief      GPT ADC/DAC trigger enable
 *
 * @param[in]  gptID:  Select the GPT module
 * @param[in]  state:  Enable / Disable 
 *
 * @return none
 *
 *******************************************************************************/
void dna_gpt_trigcmd(dna_gpt_id_e gptID, int state);

/****************************************************************************//**
 * @brief      GPT ADC/DAC trigger config
 *
 * @param[in]  gptID:  Select the GPT module
 * @param[in]  channelID:  Channel ID.It indicates which channel can trigger ADC.
 * @param[in]  triggerDelay: the delay after which a signal is generated to trigger ADC.
 *
 * @return none
 *
 *******************************************************************************/
void dna_gpt_trigconfig(dna_gpt_id_e gptID, dna_gpt_channelnumber_e channelID, uint32_t trigDelay);

/****************************************************************************//**
 * @brief     MASK / UNMASK  GPT interrupt 
 *
 * @param[in]  gptID:  Select the GPT module
 * @param[in]  intType:  Interrupt type
 * @param[in]  intMsk:   MASK / UNMASK control
 *
 * @return none
 *
 *******************************************************************************/
void dna_gpt_intmask(dna_gpt_id_e gptID, dna_gpt_int_e intType, int intMsk);



/****************************************************************************//**
 * @brief      Get GPT status flag
 *
 * @param[in]  gptID:  Select the GPT module
 * @param[in]  status:  Status type
 *
 * @return status
 *
 *******************************************************************************/
int dna_gpt_getstatus(dna_gpt_id_e gptID, dna_gpt_status_e status);

/****************************************************************************//**
 * @brief      Clear GPT status flag
 *
 * @param[in]  gptID:  Select the GPT module
 * @param[in]  status:  GPT status type
 *
 * @return none
 *
 *******************************************************************************/
void dna_gpt_statusclr(dna_gpt_id_e gptID, dna_gpt_status_e status);


/****************************************************************************//**
 * @brief  GPT0 interrupt handle function 
 *
 * @param  none
 *
 * @return none
 *
 *******************************************************************************/
void dna_gpt0_irqhandler(void);

/****************************************************************************//**
 * @brief  GPT1 interrupt handle function 
 *
 * @param  none
 *
 * @return none
 *
 *******************************************************************************/
void dna_gpt1_irqhandler(void);

/****************************************************************************//**
 * @brief  GPT2 interrupt handle function 
 *
 * @param  none
 *
 * @return none
 *
 *******************************************************************************/
void dna_gpt2_irqhandler(void);

/****************************************************************************//**
 * @brief  GPT3 interrupt handle function 
 *
 * @param  none
 *
 * @return none
 *
 *******************************************************************************/
void dna_gpt3_irqhandler(void);





int dna_gpt_getrun_status(dna_gpt_id_e gptID);
int dna_gpt_getreset_status(dna_gpt_id_e gptID);
void dna_clk_module_clkdivider(int clkModule, uint32_t divider);
void dna_clk_module_clkenable(int clockModule);
void dna_clk_gptinternal_clksrc(int gptIndex, int clockSource);

#endif
